Systolic pattern matching hardware with out-of-plane nanomagnet logic devices
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SubjectCo/Pt nanomagnets; Micromagnetic simulation; Systolic circuits; Nanomagnet logic (NML); Magnetic logic
We present the design and simulation of systolic information processing hardware that is comprised of single domain, Co/Pt magnets (i.e., out-of-plane nanomagnet logic or oNML). The designed circuit can identify instances of a preprogrammed bit sequence in streaming data. The systolic architecture 1) exploits unique benefits of the oNML device architecture such as nonvolatility and inherently pipelined logic with no memory overhead for holding the bits in the pipeline and 2) mitigates less desirable features of oNML such as nearest neighbor dataflow and longer device switching times when compared to a CMOS transistor. The designed layout is verified and analyzed by micromagnetic simulations. We quantify how the performance and energy of oNML information processing hardware compares to CMOS equivalents and conclude that the initial oNML design (including the overhead of magnetic field generation) is about an order of magnitude more power efficient at essentially iso-performance. © 2002-2012 IEEE.
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Ju X; Wartenburg S; Rezgani J; Becherer M; Kiermaier J; Breitkreutz S; Schmitt-Landsiedel D; Porod W; Lugli P; Csaba G (2012)This paper presents a computational study of logic devices built from single-domain Co/Pt nanomagnets, where magnetic properties of the dots are engineered by an inhomogenous focused ion beam (FIB) irradiation. We develop ...
Becherer M; Kiermaier J; Breitkreutz S; Csaba G; Ju X; Rezgani J; Kießling T; Yilmaz C; Osswald P; Lugli P; Schmitt-Landsiedel D (2010)Ferromagnetic Co/Pt films and single-domain magnets are characterized by various types of Extraordinary Hall-Effect (EHE) sensors. The magnetron sputtered multilayer films are annealed and measured in the temperature range ...
Niemier M; Ju X; Becherer M; Csaba G; Hu X; Schmitt-Landsiedel D; Lugli P; Porod W (IEEE, 2012)Most NML research has studied small magnet ensembles for interconnect or isolated gates. We discuss how NML might be used to process information, as well as suitable system architecture-to-device architecture mappings. A ...