Abstract
We report the fabrication of pentacene thin film transistors with a mobility of 2.17 cm/Vs which is challenging amorphous silicon. Next to device mobility, large hysteresis in the IV characteristics has been an obstacle for the design of large organic circuits in the past. It is a key success factor for optimization and widespread application of organic devices to understand the underlying principles. For the first time, we demonstrate that the observed hysteresis can fully be described by transient trap charging effects. Using the commercial finite element environment ISE TCAD, transient device behavior is simulated and compared to our experimental results. Values for density and energy of acceptor-type traps at the pentacene/SiO interface are extracted. Furthermore, we are able to determine the associated hole capture cross-section which has never been quantified before. To additionally emphasize the influence of trapping effects, it is outlined that transient measurement sweeps can systematically lead to misinterpreted mobilities if traps are not taken into account. © 2006 IEEE.