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In-Ga-Zn-O Source-Gated Transistors with 3nm SiO2 Tunnel Layer on a Flexible Polyimide Substrate
Conference proceeding   Peer reviewed

In-Ga-Zn-O Source-Gated Transistors with 3nm SiO2 Tunnel Layer on a Flexible Polyimide Substrate

Dianne Corsino, E Bestelink, Federica Catania, RA Sporea, Niko Stephan Münzenrieder and Giuseppe Cantarella
5th IEEE International Flexible Electronics Technology Conference, pp.1-3
5th IEEE International Flexible Electronics Technology Conference (San Jose, 13/08/2023 - 16/08/2023)
2023
Handle:
https://hdl.handle.net/10863/37897

Abstract

Silicon compounds Gold contacts Polyimides Voltage Logic gates Thin film transistors
url
https://ieeexplore.ieee.org/document/10254818View

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